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CMOS vs. LVCMOS: Which is the Best Output Signal for Your Application?

[fa icon="calendar"] Aug 8, 2017 6:30:00 AM / by Bliley Technologies

Bliley Technologies

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One of the most important choices an RF engineer will make is deciding what kind of output signal is the best fit for the project they’re working on. We’ve talked a lot about Complementary Metal Oxide Semiconductor (CMOS) technology over the last few weeks. There are many benefits to CMOS, but there are different variations on this technology and some are more appropriate for certain applications than others. In this week’s article, we’ll discuss the benefits of Low-Voltage Complementary Metal Oxide Semiconductors, otherwise known as “LVCMOS”.

CMOS and LVCMOS Explained

There are a number of advantages that CMOS has over other types of output signals. CMOS clocks are generally inexpensive, perform well in terms of keeping phase noise to a minimum, and are well-suited to digital circuit designs, particularly those with shorter trace lengths. A compelling argument could be made, however, that the greatest advantage of CMOS technology is lower power requirements compared to other types of outputs.

CMOS integrated circuits were first developed in the 1960s, and one of their distinguishing features was their ability to operate over a wider range of power supply voltages than other circuit types — anywhere from 3 to 15 volts. As time passed and the technology has continued to improve, there has been a shift toward lower supply voltage in CMOS designs. Manufacturers began to reduce the geometry of their circuit designs in order to cut costs and improve performance. This reduction in size was necessarily accompanied by a further reduction in the use of power, so that the resistors could operate as intended. This fit into the larger trend moving toward lower power designs, and as a result of all this scaling down of CMOS tech, a new “low voltage” class of CMOS integrated circuits was born.

What constitutes “low” voltage? The Joint Electron Device Engineering Council (JEDEC) has defined the supply voltage and interface standards for LVCMOS:

  •      3.0 V – 3.3 V
  •      2.5 V ± 0.2 V (Normal Range) and 1.8 V – 2.7 V (Wide Range)
  •      1.5 V ± 0.1 V (Normal Range) and 0.9 V – 1.6 V (Wide Range)
  •      1.2 V ± 0.1 V (Normal Range) and 0.8 V – 1.3 V (Wide Range)
  •      1.0 ± 0.1 V (Normal Range and 0.7 V – 1.1 V (Wide Range)

Is a LVCMOS Output Signal Right for My Application?

LVCMOS output signals are used for certain low-powered medical imaging equipment, as well as portable testing and measurement devices, industrial testing equipment, and networking and communication systems. LVCMOS is well-suited to both wireless and wired infrastructure.

That covers a lot of ground there. So, is it the best output for your application?

The short answer is it depends. Specifically, it all depends on what your power availability is for your application. If you have access to more power and the application requires it, then going with a higher voltage CMOS clock might make more sense. If your power supply is limited and you are trying to reduce power costs, however, then LVCMOS is the way to go.

CMOS and all its variants have a lot of advantages. But it’s important to get it right the first time during the design stage when you’re deciding which signal output to go with. Your decision will also depend on what your priorities are (reducing phase noise, power use, etc.) It can be a tough choice, and making the wrong one can result in a lot of wasted time and money. To help make this process easier for you, we’ve put together a helpful guide that analyzes the pros and cons of all single-ended and differential output types.

When you’re ready to pick your the oscillator or clock that best meets your needs, you’ll have all the information you need. Check out our free guide here.

Schedule a technical discussion with our engineers

Topics: crystal oscillators, CMOS, LVCMOS

Bliley Technologies

Written by Bliley Technologies

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